Chain Reaction

[CasVeg]

There's even been some research that indicates that music, all music, has an innate fractal structure.

Actually, the research shows that music follows the pattern of 1/f noise.

You're both right: 1/f noise has a fractal structure.

=P That'll teach ya to sully my honor.

You have honor to sully?

[SolidusRaccoon]

No, but I have honor to mulder. Ohhhh that's just bad, even for me.

[StrangeWulf13]

*pegs both Solidus and CasVeg with rainbow trout*

I'm gonna have to visit the open market and restock my ammo if they keep this up...

[SolidusRaccoon]

*takes the trout* thanks for lunch, yummy free food.

[Shyal_malkes]

I am ashamed to admit it (having been a little of an X-files fan, but it took me reading that pun three times before I got it!

and now that I do i'm sharpening my katana for whoever else wants to make another stinkin' pun.

[SolidusRaccoon]

I am ashamed to admit it (having been a little of an X-files fan, but it took me reading that pun three times before I got it!

and now that I do i'm sharpening my katana for whoever else wants to make another stinkin' pun.

I'll pass on that offer.

[Solarfox]

If I recall correctly, all the other gates can be built from AND, OR, and NOT gates.

A small correction:
ALL other gates can be made just from NAND gates.

True, but no one actually does it that way as a general design method. The propagation delays add up too much, compared to a "dedicated" logic gate -- look at the actual transistor circuitry inside a 74xx-series IC sometime. (You might have to find an old 70's or 80's-era databook to see them, though; I don't know if they actually put the transistor-circuit schematics in databooks anymore.)

Normally, this is only done when you find yourself in a situation where you have a couple of leftover NANDs in an IC, you only need one gate of some other type to finish the design, and you don't want to waste board space with another chip just to get that one gate. (And when the circuit isn't time-critical and you don't care about the propagation delays. )

The only other time you see this kind of thing done is in programmable logic arrays... and there you usually have a compiler to convert your circuit design into NANDs for you.

Memory can be constructed of latches, and a simple one can be made out of four NAND gates.

Actually, an even simpler latch can be made out of only two NANDs -- you just have to be careful not to let both the Reset and Set inputs go to logic-0 simultaneously.

[RHJunior]

actually, it's more a matter of discovering 2 or 3 boolean gates, and extrapolating the rest. If I recall correctly, all the other gates can be built from AND, OR, and NOT gates. Once you've hit on the idea of a relay that only throws if both inputs are fired, or a relay that cuts off power flow when it's activated, the rest would tend to follow rather quickly.

A small correction:
ALL other gates can be made just from NAND gates.
To make a NOT, tie the inputs together to one.
To make a AND gate, place a NOT on the output of the NAND.
To make an OR gate, place NOTs on the input of a NAND gate.
A NOR gate is an OR gate with a NOT on the output, or an AND with NOT on the inputs.
XOR is a bit more difficult.
Take the inputs and run them into both an OR and a NAND, then run the outputs through an AND gate.

Memory can be constructed of latches, and a simple one can be made out of four NAND gates.

Yeah, I play with electronics at home...

.....

Could you draw a picture of that and post it?

[Lou Leghorn]

actually, it's more a matter of discovering 2 or 3 boolean gates, and extrapolating the rest. If I recall correctly, all the other gates can be built from AND, OR, and NOT gates. Once you've hit on the idea of a relay that only throws if both inputs are fired, or a relay that cuts off power flow when it's activated, the rest would tend to follow rather quickly.

A small correction:
ALL other gates can be made just from NAND gates.
To make a NOT, tie the inputs together to one.
To make a AND gate, place a NOT on the output of the NAND.
To make an OR gate, place NOTs on the input of a NAND gate.
A NOR gate is an OR gate with a NOT on the output, or an AND with NOT on the inputs.
XOR is a bit more difficult.
Take the inputs and run them into both an OR and a NAND, then run the outputs through an AND gate.

Memory can be constructed of latches, and a simple one can be made out of four NAND gates.

Yeah, I play with electronics at home...

.....

Could you draw a picture of that and post it?

I hope Anthony doesn't mind me jumping in here, but I decided to get out my "Handbook of Digital Logic... With Practical Applications", and re-familiarize myself with basic logic circuits, and attempt to draw these gates using only NAND gates.




I presume he'll also let me know if I made a mistake... or ten.